1. Field of the Invention
This invention relates to vertical cavity surface emitting lasers. More specifically, it relates to GaAs/Al(Ga)As Distributed Bragg Refelectors (DBRs) as used in vertical cavity surface emitting lasers.
2. Discussion of the Related Art
Vertical cavity surface emitting lasers (VCSELs) represent a relatively new class of semiconductor lasers. While there are many variations of VCSELs, one common characteristic is that they emit light perpendicular to a wafer""s surface. Advantageously, VCSELs can be formed from a wide range of material systems to produce specific characteristics.
VCSELs include semiconductor active regions, which can be fabricated from a wide range of material systems, distributed Bragg reflector (DBR) mirrors, current confinement structures, substrates, and contacts. Because of their complicated structure, and because of their material requirements, VCSELs are usually grown using metal-organic chemical vapor deposition (MOCVD).
FIG. 1 illustrates a typical VCSEL 10. As shown, an n-doped gallium arsenide (GaAs) substrate 12 has an n-type electrical contact 14. An n-doped lower mirror stack 16 (a DBR) is on the GaAS substrate 12, and an n-type graded-index lower spacer 18 is disposed over the lower mirror stack 16. An active region 20, usually having a number of quantum wells, is formed over the lower spacer 18. A p-type graded-index top spacer 22 is disposed over the active region 20, and a p-type top mirror stack 24 (another DBR) is disposed over the top spacer 22. Over the top mirror stack 24 is a p-type conduction layer 9, a p-type cap layer 8, and a p-type electrical contact 26.
Still referring to FIG. 1, the lower spacer 18 and the top spacer 22 separate the lower mirror stack 16 from the top mirror stack 24 such that an optical cavity is formed. As the optical cavity is resonant at specific wavelengths, the mirror separation is controlled to resonant at a predetermined wavelength (or at a multiple thereof). At least part of the top mirror stack 24 includes an insulating region 40 that provides current confinement. The insulating region 40 is usually formed either by implanting protons into the top mirror stack 24 or by forming an oxide layer. In any event, the insulating region 40 defines a conductive annular central opening 42 that forms an electrically conductive path though the insulating region 40.
In operation, an external bias causes an electrical current 21 to flow from the p-type electrical contact 26 toward the n-type electrical contact 14. The insulating region 40 and the conductive central opening 42 confine the current 21 such that the current flows through the conductive central opening 42 and into the active region 20. Some of the electrons in the current 21 are converted into photons in the active region 20. Those photons bounce back and forth (resonate) between the lower mirror stack 16 and the top mirror stack 24. While the lower mirror stack 16 and the top mirror stack 24 are very good reflectors, some of the photons leak out as light 23 that travels along an optical path. Still referring to FIG. 1, the light 23 passes through the p-type conduction layer 9, through the p-type cap layer 8, through an aperture 30 in the p-type electrical contact 26, and out of the surface of the vertical cavity surface emitting laser 10.
It should be understood that FIG. 1 illustrates a typical VCSEL, and that numerous variations are possible. For example, the dopings can be changed (say, by providing a p-type substrate), different material systems can be used, operational details can be tuned for maximum performance, and additional structures, such as tunnel junctions, can be added. Furthermore, with long wavelengths it is often beneficial to insert a reversed biased n++/p++ tunnel junction between the top spacer 22 and the active region 20, and to change the doping type of the top structures to n-type. This is because p-doped materials absorb more light than n-doped materials, and with longer wavelengths the optical gain become more critical. The tunnel junction converts electrons into holes, which are then injected into the active region.
While generally successful, VCSELs have problems. For example, a major problem in realizing commercial quality long wavelength VCSELs is the available mirror materials. Long wavelength VCSELs are often based on InP material systems. For proper lattice matching, an InP-based VCSEL usually uses InP/InGaAsP or AlInAs/AlInGaAs mirrors. However, because those materials have relatively low refractive index contrasts, 40-50 mirror pairs are typically needed to achieve the required high reflectivity. Growing that number of mirror pairs takes a long time, which increases the production costs.
Other mirror material systems have been tried. For example, xe2x80x9cMetamorphic DBR and tunnel-Junction Injection: A CW RT Monolithic Long-Wavelength VCSEL,xe2x80x9d IEEE Journal of Selected topics In Quantum Electronics, vol. 5, no. 3, May/June 1999, describes an InP-InGaAsP DBR, a GaAlAsSb-AlAsSb DBR, and a GaAlIsSb-AlAsSb DBR. Furthermore, that article describes using a reversed biased n++/p++ tunnel junction for injecting current into the active layer. While such mirror material systems are advantageous, their lattice match, refractive index contrast, and thermal conductivity characteristics are not optimal. Additionally, GaAs/Al(Ga)As is still considered to form the best distributed Bragg reflector mirrors because of its high refractive index contrast, high thermal conductivity, and the feasibility of using oxidation to enable the formation of oxide insulating regions 40.
Thus, new long wavelength VCSELS would be beneficial. Also beneficial would be GaAs/Al(Ga)As top DBRs that are fabricated on InP. Also beneficial would be a method of fabricating GaAs/Al(Ga)As top DBRs in InP-based VCSELs. Furthermore, a new type of InP based VCSEL having GaAs/Al(Ga)As top DBRs and bottom mirror systems comprised of different materials also would be beneficial.
Accordingly, the principles of the present invention are directed to VCSEL device structures suitable for use in long wavelength VCSELS. Those principles specifically provide for a new method of growing GaAs/Al(Ga)As top DBRs on InP materials. Those principles further provide for InP-based VCSELS having GaAs/Al(Ga)As top DBRs. Such VCSELS can be fabricated with bottom mirrors comprised of different material systems. Therefore, the principles of the present invention directly provide for VCSELS device structures that enable InP-based VCSELs having GaAs/Al(Ga)As top mirror DBRs and bottom mirror systems of different materials.
A GaAs/Al(Ga)As top DBR according to the principles of the present invention is grown on InP using MOCVD and multi-step processing. The multi-step processing proceeds as follows. First, an InP layer (such as an InP spacer or an InP-based active layer) is formed. Then, an MOCVD growth temperature is set to about 400-450xc2x0 C. Then, a 20-40 nanometer thick, fast GaAs layer is grown on the InP layer. After that, the temperature is increased to around 600xc2x0 C. A high temperature GaAs seed layer, about 100 nm thick, is then grown on the low temperature GaAs layer. Beneficially, an insulation layer comprised of SiO2 or Si2N4 is formed on the GaAs seed layer. If used, that insulation layer is patterned to form an opening. Then, a high temperature GaAs/Al(Ga)As top DBR is grown on the GaAs seed layer. The GaAs/Al(Ga)As mirror is beneficially grown using lateral epitaxial overgrowth.
A VCSEL according to the principles of the present invention includes a bottom DBR mirror on an InP substrate, which is beneficially n-doped. Then, an n-doped bottom InP spacer is grown on the bottom DBR mirror. Beneficially, an active region having a plurality of quantum wells is then grown on the n-doped InP spacer. Beneficially, a reversed biased tunnel junction is disposed over the active region. An n-doped top InP spacer is then beneficially grown on the tunnel junction. Also beneficially, an n-doped GaAs/Al(Ga)As top DBR is grown on the n-doped top InP spacer.
Preferably, the GaAs/Al(Ga)As top DBR is grown by a multi-step process using MOCVD. First, the growth temperature is set to 400-450xc2x0 C. Then, a 20-40 nanometer thick low temperature GaAs layer is grown on the n-doped top InP spacer. After that, the temperature is increased to around 600xc2x0 C. A high temperature GaAs seed layer, about 100 nm thick, is then grown on the low temperature GaAs layer. Then an insulation layer comprised of SiO2 or Si2N4 is formed on the GaAs seed layer. The insulation layer is patterned to form an opening. A high temperature GaAs layer is then grown on the GaAs seed layer, followed by a GaAs/Al(Ga)As top DBR. The high temperature GaAs layer and the GaAs/Al(Ga)As mirror are beneficially grown using lateral epitaxial overgrowth.
Beneficially, a VCSEL according to the principles of the present invention includes a bottom DBR fabricated using a material system that is compatible with InP. For example, the bottom mirror could be an AlPSb/GaPsb DBR mirror, an AlGaInAs/AlInAs DBR mirror, or an InP/InGaAsP DBR.
According to another aspect of the present invention, a bottom AlGaInAs/AlInAs DBR mirror, an AlPSb/GaPsb DBR mirror, or an InP/InGaAsP DBR mirror is grown on an n-doped InP substrate. Then, an n-doped bottom InP spacer is grown on the bottom mirror. Beneficially, an active region having a plurality of quantum wells is then grown on the n-doped bottom InP spacer, followed by a reversed biased N++/P++ tunnel junction over the active region. An n-doped top InP spacer is beneficially grown on the tunnel junction. Also beneficially, an n-doped GaAs/Al(Ga)As top DBR is grown on the n-doped top InP spacer.
Preferably, the GaAs/Al(Ga)As top DBR is grown by a multi-step process using MOCVD. First, the growth temperature is set to 400-450xc2x0 C. Then, a 20-40 nanometer thick low temperature GaAs layer is grown on the n-doped top InP spacer. After that, the temperature is increased to around 600xc2x0 C. A high temperature GaAs seed layer, about 100 nm thick, is then grown on the low temperature GaAs layer. Then, an insulation layer comprised of SiO2 or Si2N4 is formed on the GaAs seed layer. That insulation layer is then patterned to form an opening. A high temperature GaAs layer is then grown on the GaAs seed layer. Then, a GaAs/Al(Ga)As top DBR is grown on the high temperature GaAs layer. The GaAs layer and the GaAs/Al(Ga)As mirror are beneficially grown using lateral epitaxial overgrowth.
Additional features and advantages of the invention will be set forth in the description that follows, and in part will be apparent from that description, or may be learned by practice of the invention.